Springer
W. Grieskamp , C. Weise
Lecture Notes in Computational Science and Engineering
International Workshop on Formal Approaches to Software Testing
Specification and Analysis of Embedded Systems

Blom, S., Ioustinova, N., van de Pol, J., Rennoch, A., & Sidorova, N. (2006). Simulated Time for Testing Railway Interlockings with TTCN-3. In W. Grieskamp & C. Weise (Eds.), LNCS (pp. 1–15). Springer.