Diagonal Circuit Identity Testing and Lower Bounds

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Keywords	arithmetic circuit, identity testing, depth 3 or 4, determinant, permanent, lower bounds
MSC	Research exposition (monographs, survey articles) (msc 00-02)
Series	Electronic Colloquium on Computational Complexity
Project	Quantum Information Processing
Organisation	Quantum Computing and Advanced System Research
Citation APA APA Style APA-ALL Style AAA Style Cell Style Chicago Style Harvard Style IEEE Style MLA Style Nature Style Vancouver Style American-Institute-of-Physics Style Council-of-Science-Editors Style BibTex Format Endnote Format RIS Format CSL Format DOIs only Format	Saxena, N. (2007). Diagonal Circuit Identity Testing and Lower Bounds. In Electronic Colloquium on Computational Complexity (TR07-124).

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